A) Field of the Invention
The present invention relates to a semiconductor device and its manufacture method, and more particularly to a semiconductor device mounted on a support substrate (sub-mount substrate) and its manufacture method.
B) Description of the Related Art
FIG. 12 is a cross sectional view of a semiconductor light emitting device and a sub-mount substrate disclosed in Japanese Patent Laid-open publication No. 2003-31851. A semiconductor light emitting device 210 is mounted on a sub-mount substrate 200. The sub-mount substrate 200 is constituted of an auxiliary n-side electrode layer 203 and an auxiliary p-side electrode layer 204 formed on the surface of a silicon substrate 201. An oxide coating film 202 is disposed between the auxiliary n-side electrode layer 203 and silicon substrate 201 to electrically insulate the auxiliary n-side electrode layer 203 and silicon substrate 201. The auxiliary p-side electrode layer 204 is formed directly on the surface of the silicon substrate 201. For example, the auxiliary electrode layers 203 and 204 are made of alloy of Au and Sn or indium contained alloy.
On the surface of the semiconductor light emitting device 210 using a sapphire substrate and facing the sub-mount substrate 200, an n-side electrode 211 and a p-side electrode 212 are formed. The n-side electrode 211 is soldered to the auxiliary n-side electrode layer 203, and the p-side electrode 212 is soldered to the auxiliary p-side electrode layer 204.
The silicon substrate 201 is mounted on a p-side terminal portion 220a of a lead frame 220. The auxiliary n-side electrode 203 is connected to an n-side terminal portion of the lead frame 220 by a wire 221.
Light emitted from the semiconductor light emitting device 210 is irradiated through the sapphire substrate toward the side opposite to the sub-mount substrate 200.
Japanese Patent Publications No. 2914065, No. 2770717 and No. 3292044 disclose techniques of covering a surface of a semiconductor light emitting device with an insulating protective film. Japanese Patent Publication No. 3255281 discloses techniques of inserting an adhesion reinforcing layer of Ti, Ni, W or the like between an electrode and a protective film.
When the semiconductor light emitting device 210 shown in FIG. 12 is mounted on the sub-mount substrate 200, the p-side electrode and n-side electrode are short-circuited in some cases by melted and laterally flowed AuSn alloy or the like. This short circuit cannot be prevented even if the semiconductor light emitting device is covered with a protective film.